I am a PhD candidate in the Computer Science department at the University of Utah. I am advised by Prof. Rajeev Balasubramonian at the Utah Arch Lab. I am interested in a wide range of topics spreading Computer Arcitecture, Neural networks and VLSI architectures.
Prior to joining the U in 2017, I was working as a design Engineer for Advanced Micro Devices (AMD), Hyderabad.
Apart from work, I blog on diverse topics like explaining computer architecture to a layman, tutorials on how to work with various tools etc.
sgudapar [at] cs [dot] utah [dot] edu
PhD in Computer Science • Present
Masters in Technology (M.Tech) in VLSI & Computer Engineering • April 2015
Bachelors in Technology (B.Tech) in Electrical & Electronics Engineering • April 2013
Research Intern • May 2020 - August 2020
Memory optimization, cache hierarchy analysis, and profiling of fleet data in Google datacenters.
Co-Op Engineer • May 2019 - August 2019
Exploring Memory Security, and Process In Memory (PIM) architectures.
Research Assistant • August 2017 - Present
Currently exploring ASIC accelerator architectures for training and inference of Neural Networks.
Design Engineer • May 2016 - July 2017
I was working on Industrial grade server and client micro architectures. Major part of my work focussed on SoC security verification of AMD chip sets.
Design Engineer • June 2015 - April 2016
A major part of my work was focussed on designing, building and testing of the controllers for the solar tracking systems. I also worked on making boost controllers and FPGA based tracking systems for the high power solar tracking systems.
EMC2, held in conjunction with ASPLOS • 2018