Erik Brunvand

Slightly Less Recent Publications

Journals:

Ganesh Gopalakrishnan, Prabhakar Kudva, and Erik Brunvand, ``Peephole Optimization of Asynchronous Macromodule Networks,'' IEEE Transactions on VLSI Systems, Vol. 7, No. 1, March 1999.

V. Chandramouli, Erik Brunvand, and Kent Smith, "Self-Timed Design in GaAs - Case Study of a High-Speed Parallel Multiplier,"IEEE Transactions on VLSI Systems, March 1996.

Erik Brunvand, Steve Furber, and Takashi Nanya eds., Special issue on Asynchronous Computer Architecture, IEE Journal on Computers and Digital Techniques. Vol. 143, No 5, September 1996.

Erik Brunvand, "Designing Self-Timed Systems using Concurrent Programs", Journal of VLSI Signal Processing, 7, pp47-59 (1994), Special issue on asynchronous systems.

Ganesh Gopalakrishnan, Erik Brunvand, Nick Michell, and Steve Nowick, "A Correctness Criterion for Asynchronous Circuit Validation and Optimization", IEEE Transactions on Computer Aided Design V13, n11, November 1994.

Erik Brunvand, "Using FPGAs to Implement Self-Timed Systems", Journal of VLSI Signal Processing, 6, pp173-190, 1993, Special issue on FPGAs.

Erik Brunvand, Ganesh Gopalakrishnan eds. Special issue on asynchronous circuits and systems, Integration: The VLSI Journal. vol 15 (1993).

Conferences:

Hans Jacobsen, Erik Brunvand, Ganesh Gopalakrishnan, and Prabhakar Kudva, ``High Level Asynchronous System Design Using the ACK Framework,'' In International Conference on Advanced Research in Asynchronous Circuits and Systems (Async2000), Eilat, Israel, April 2000.

Erik Brunvand, Steven Nowick, and Kenneth Yun, ``Tutorial on Practical Asynchronous Circuit Design,'' Design Automation Conference, DAC-99, New Orleans, LA, June 1999.

Erik Brunvand, Steven Nowick, and Kenneth Yun, ``Modern Asynchronous Circuit Design,'' TAU-99, Monteray, CA, March 1999.

J. Carter, W. Hsieh, L. Stoller, M. Swanson, L. Zhang, E. Brunvand, A. Davis, C.-C. Kuo, R. Kuramkote, M. Parker, L. Schaelicke, and T. Tateyama, "Impulse: Building a Smarter Memory Controller ," The Proceedings of the Fifth Internationl Symposium on High Performance Computer Architecture, Jan 1999

Erik Brunvand, Steven Nowick, and Kenneth Yun, "Practical Advances in Asynchronous Circuits and Systems," International Conference on Computer Design (ICCD 97), pp 662--668.

Erik Brunvand, "Bugs and Glitches in Computer Folklore", American Folklore Society, Austin TX, October 1997.

Ajay Khoche and Erik Brunvand, "Critical Hazard-Free Test Generation for Asynchronous Circuits," VLSI Test Symposium (VTS'97), pp 203--208.

Ajay Khoche and Erik Brunvand, "ACT: A DFT Tool for Self-Timed Circuits," International Test Conference (ITC'97), pp 829--837.

William Richardson and Erik Brunvand, "Fred: A Decoupled Self-Timed Computer Architecture with Precise Exceptions," IEE Proceedings on Computers and Digital Techniques, special issue on Asynchronous Processors, Vol. 143, No. 5, September 1996.

 

Erik Brunvand, "The Heroic Hacker: Legends of the Computer Age," American Folklore Society, October 1996.

William Richardson and Erik Brunvand, "Fred: A Decoupled Self-Timed Computer," International Conference on Advanced Research in Asynchronous Circuits and Systems (Async96), Aizu, Japan, March 1996.

Sandeep Pagey, Ajay Khoche and Erik Brunvand, "DFT for Fast Testing of Self-Timed Control Circuits," 4th IEEE Asian Test Symposium, 1995.

William Richardson and Erik Brunvand, "Precise Exception Handling for a Self-Timed Processor," in IEEE International Conference on Computer Design (ICCD95) Winner of best paper award in Design & Test track at ICCD95.

Ajay Khoche and Erik Brunvand, "Testing Self-Timed Circuits using Partial Scan," in 2nd Working Conference on Asynchronous Design Methodologies, South Bank University, London, May 1995.

Ajay Khoche and Erik Brunvand, "A Partial-Scan Methodology for Testing Self-Timed Circuits", in 13th IEEE VLSI Test Symposium, Princeton, NJ, April 1995.

 

Erik Brunvand, "Low Latency Self-Timed Flow Through FIFOs", in 16th Conference on Advanced Research in VLSI, Chapel Hill, NC, March 1995.

 

Jae-Tack Yoo, Erik Brunvand, and Kent Smith, "Automatic Prototyping of Semi-Custom Integrated Circuits using Actel FPGAs", in Fifth Great Lakes Symposium on VLSI, Buffalo, NY, March 1995.

Erik Brunvand, "Reduced Latency Self-Timed FIFO Circuits", Technical Report UUCS-94-037, University of Utah, Department of Computer Science.

Ajay Khoche and Erik Brunvand, "Testing Micropipelines", In Symposium on Advanced Research in Asynchronous Circuits and Systems (Async94), November 1994.

Ganesh Gopalakrishnan, Prabhakar Kudva, and Erik Brunvand, "Peephole Optimization of Asynchronous Macromodule Networks", In International Conference on Computer Design (ICCD), October 1994.

Prabhakar Kudva, Ganesh Gopalakrishnan, and Erik Brunvand, "Performance Analysis and Optimization of Asynchronous Circuits", In International Conference on Computer Design (ICCD), October 1994.

Joe Novak and Erik Brunvand, "Using FPGAs to Prototype a Self-Timed Floating Point Co-Processor", Custom Integrated Circuits Conference (CICC), 1994.

Erik Brunvand, "Using FPGAs to Implement Self-Timed Systems", Journal of VLSI Signal Processing, 6, pp173-190, 1993, Special issue on FPGAs.

Lüli Josephson, Erik Brunvand, John F. Hurdle, and Ganesh Gopalakrishnan, "Reliable Interface Design for Combining Asynchronous and Synchronous Circuits", In Fifth NASA Symposium on VLSI Design, Albuquerque, New Mexico. November 1993.

John F. Hurdle, Peter Conwell, and Erik Brunvand, Robust Neural "Classifier Circuits using Asynchronous Design", In Fifth NASA Symposium on VLSI Design, Albuquerque, New Mexico. November 1993.

Ajay Khoche and Erik Brunvand, "Testing Self-Timed Circuits using Scan Paths", In Fifth NASA Symposium on VLSI Design, Albuquerque, New Mexico. November 1993.

Erik Brunvand, "Windchime: An FPGA-based Self-Timed Parallel Processor", In 3rd International Workshop on Field Programmable Logic and Applications, Oxford, September, 1993.

John F. Hurdle, Lüli Josephson and Erik Brunvand, "Reliable Interfacing of Self-Timed FPGA-based Hybrid Neural/Rule-Based Classifiers to Synchronous Co-Processors", In 3rd International Workshop on Field Programmable Logic and Applications, Oxford, September, 1993.

Erik Brunvand, "The NSR Processor", In 26th Hawaiian International Conference on System Sciences, Maui, Hawaii, Jan 1993.

John F. Hurdle, Erik Brunvand, Lüli Josephson, and Ganesh Gopalakrishnan, "Asynchronous Models for Large Scale Neurocomputing Applications", In Fifth International Conference on Neural Networks and their Applications, Nimes, France, November 1992.

Erik Brunvand, Nick Michell, and Kent Smith, "A Comparison of Self-Timed Design using FPGA, CMOS, and GaAs Technologies," In International Conference on Computer Design (ICCD), Cambridge, Mass., October 1992.

Erik Brunvand, "Using FPGAs to Prototype a Self-Timed Computer," In 2nd International Workshop on Field-Programmable Logic and Applications, Vienna Institute of Technology, August 1992.

Erik Brunvand, "Implementing Self-Timed Systems with FPGAs," In International Workshop on Field Programmable Logic and Applications, Oxford, September, 1991.

Erik Brunvand, "Implementing Self-Timed Systems with FPGAs", In FPGAs Abingdon EE\&CS Books, Abington, England 1991, pp 312-323, Will R. Moore and Wayne Luk, Editors.

Erik Brunvand and Mike Starkey, "An Integrated Environment for the Design and Simulation of Self-Timed Systems," In VLSI-91, IFIP, August 1991.

Erik Brunvand and Robert F. Sproull, "Translating Concurrent Programs into Delay-Insensitive Circuits," In ICCAD-89, pp 262-265, IEEE, November 1989.

Technical reports and other publications:

William Richardson and Erik Brunvand, "The NSR Processor Prototype," Technical Report UUCS-92-029.

Erik Brunvand, "A Cell Set for Self-Timed Design using Actel FPGAs," Technical Report UUCS-91-013, University of Utah, 1991.

Erik Brunvand and Robert F. Sproull, "Translating Concurrent Communicating Programs into Delay Insensitive Circuits," Technical Report CMU-CS-89-126, Carnegie Mellon University, 1989.

Erik Brunvand, ``Parts-R-Us: A Chip Aparts," Technical Report CMU-CS-87-119, Carnegie Mellon University, 1987.

Erik Brunvand and Ivan E. Sutherland, "An Asynchronous Q-Bus Interface," Technical Memo 4677, Sutherland, Sproull, and Associates, 1986.

Erik Brunvand, "Translating Concurrent Communicating Programs into Asynchronous Circuits," Ph.D. Dissertation, Carnegie Mellon University, 1991 (Available as Technical Report CMU-CS-91-198).

Erik Brunvand, "Context Addressable Memory for Symbolic Processing Systems," Masters Thesis, University of Utah, 1984.

Last modified May 2011