Digital VLSI Chip Design
with Cadence and Synopsys
CAD Tools


By Erik Brunvand

Trademark and Copyright Information

Trademarks of Cadence Design Systems, Inc.

Registered Trademarks ®: Cadence, 1st SiliconSuccess, Accelerating Mixed Signal Design, Allegro Assura, BuildGates, Conformal, Concept, Connections, Diva, Dracula, ElectronStorm, Encounter, EU CAD, Fire & Ice, First Encounter, HDL-ICE, Incisive, Invisible Specman, Nano Encounter, NanoRoute, NC-Verilog, NeoCell, NeoCircuit, Neo Circuit---RF, NeoIP, OpenBook, OrCAD, OrCAD Capture, OrCAD Layout, Palladium, Pearl, PowerSuite, PSpice, SignalStorm, Silicon Ensemble, SKILL, SourceLink, SPECCTRA, SPECCTRAQuest, Spectre, Specman, Specman Elite SpeedBridge, Stars & Strikes, Verifault-XL, Verification Advisor, Verilog, Virtuoso, VoltageStorm and Xtreme are registered trademarks of Cadence Design Systems, Inc.

Trademarks ™:The Cadence logo, InstallScape, IP Gallery, Silicon Design Chain, Silicon Express, and SoC Encounter are trademarks of Cadence Design Systems, Inc.

Trademarks of Synopsys, Inc.

Registered Trademarks ®: Synopsys, AMPS, Astro, Behavior Extracting Synthesis Technology, Cadabra, CATS, Certify, Design Compiler, DesignWare, Formality, HDL Analyst, HSIM, HSPICE, Identify, iN-Phase, Leda, MAST, ModelTools, NanoSim, OpenVera, PathMill, Physical Compiler, PrimeTime, SCOPE, Simply Better Results, SiVL, SNUG, SolvNet, Syndicated, Synplicity, the Synplicity logo, Synplify, Synplify Pro, Synthesis Constraints Optimization Environment, TetraMAX, VCS, Vera, and YIELDirector are registered trademarks of Synopsys, Inc.

Trademarks ™: AFGen, Apollo, Astro-Rail, Astro-Xtalk, Aurora, AvanWaves, BEST Columbia, Columbia-CE, Confirma, Cosmos, CosmosLE, CosmosScope, CRITIC, DC Expert, DC Professional, DC Ultra, Design Analyzer, Design Vision, DesignerHDL, DesignPower, Direct Silicon Access, Discovery, Eclypse, Encore, EPIC, Galaxy, Galaxy Custom Designer, HANEX, HAPS, HapsTrak, HDL Compiler, Hercules, Hierarchical Optimization Technology, High-performance ASIC Prototyping System, HSIMplus, i-Virtual Stepper, IICE, in-Sync, iN-Tandem, Jupiter, Jupiter-DP, JupiterXT, JupiterXT-ASIC, Liberty, Libra-Passport, Library Compiler, Magellan, Mars, Mars-Rail, Mars-Xtalk, Milkyway, ModelSource, Module Compiler, MultiPoint, Physical Analyst, Planet, Planet-PL, Polaris, Power Compiler, Raphael, Saturn, Scirocco, Scirocco-i, Star-RCXT, Star-SimXT, System Compiler, System Designer, Taurus, TotalRecall, TSUPREM-4, VCS Express, VCSi, VHDL Compiler, VirSim, and VMC are trademarks of Synopsys, Inc.

Last modified June 8, 2009.