/* positive edge triggered D flip-flop with active low reset  */
cell(dff) { 
    area : 972;
    cell_footprint : "dff";
    ff("IQ", "IQN") {
        next_state : " D ";
        clocked_on : " G ";
        clear : " CLR' "; 
    }
    pin(D)    {
      direction : input;
      capacitance : 0.0225;

      timing() { /* hold time constraint for a rising transition on G */
        timing_type : hold_rising;
                rise_constraint(scalar) { values("-0.298"); }
                fall_constraint(scalar) { values("-0.298"); }
        related_pin : "G";
      }
      timing() { /* setup time constraint for a rising transition on G */
        timing_type : setup_rising;
                rise_constraint(scalar) { values("0.018"); }
                fall_constraint(scalar) { values("0.018"); }
        related_pin : "G";
      }
    } /* end of pin D */
    pin ( CLK )    {
      direction : input;
      capacitance : 0.0585;
      clock : true;
    } /* end of pin CLK */
    pin ( CLR )    {
      direction : input;
      capacitance : 0.0135;
    } /* end of pin CLR */
    pin ( Q )    {
      direction : output;
      function  : "IQ";

      timing () { /* propagation delay from rising edge of CLK to Q */
        timing_type : rising_edge;
                 cell_rise(lu5x5) { values( "..." );}
                 rise_transition(lu5x5) { values( "..." );}
                 cell_fall(lu5x5) { values( "..." );}
                 fall_transition(lu5x5) { values( "..." );}
        related_pin : "CLK";
      } /* end of Q timing related to CLK */
      
      timing () { /* propagation delay from falling edge of clear to Q=0 */
        timing_type : clear;
        timing_sense : positive_unate;
                 cell_fall(lu5x5) { values( "..." );}
                 fall_transition(lu5x5) { values( "..." );}
        related_pin : "CLR";
      } /* end of Q timing related to CLR */
    } /* end of pin Q */
  } /* end of cell dff */