www.intel.com/software/tsx

Performance paper: 
http://pcl.intel-research.net/publications/SC13-TSX.pdf

Intel Transactional Synchronization Extensions
http://software.intel.com/sites/default/files/blog/393551/sf12-arcs004-100.pdf

Intel optimization manual
https://www-ssl.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-optimization-manual.pdf

Analysis of Haswell’s Transactional Memory (good entry paper)
http://www.realworldtech.com/haswell-tm/2/

From Intel:
http://pcl.intel-research.net/publications/SC13-TSX.pdf  
http://software.intel.com/sites/default/files/managed/4d/2a/hpca_TSX.pdf 
                                                                                                                                                                                         
 Emulator based (not sure how relevant these results are) 
    http://www.news.cs.nyu.edu/~jinyang/pub/skiplist-apsys13.pdf 

 More papers from Google Scholar 
 http://scholar.google.com/scholar?bav=on.2,or.r_qf.&bvm=bv.61190604,d.b2I,pv.xjs.s.en_US.iiOPisWRDb4.O&biw=1680&bih=940&um=1&ie=UTF-8&lr=&cites=441794717481093627 

Data structures (PPoPP'14): 

     https://sites.google.com/site/ppopp2014/home/schedule

     A general technique for non-blocking trees
     http://dl.acm.org/citation.cfm?id=2555267

     Pragmatic Primitives for Non-blocking Data Structures
     http://www.cs.utoronto.ca/~tabrown/podc13/paper.pdf
     
The Common System Interface: Intel’s Future Interconnect
http://www.realworldtech.com/common-system-interface/5/